ST20-C1 datasheet(59/205 Pages) STMICROELECTRONICS

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5 Multiply accumulate

5.5

Data vectors

Both

biquad and smacloop operate on arrays of 16-bit values, packed two per word.

This allows the ST20-C1 to read two values per cycle from memory which is funda-

mental to the high performance of the multiply-accumulate instructions. In all cases,

data values must be half-word aligned.

Figure 5.1 ST20-C1

biquad instruction example: Q15 = Q15

× Q14

5.6

Scaling

The

biquad and smacloop operations are performed with an oversize accumulator of

48 bits. The accumulator value is always sign-extended to the full width of the accu-

mulator.

During a multiply-accumulate sequence the value in the accumulator may temporarily

go outside the representable range of the final result, but can never overflow the accu-

mulator for a single

biquad or smacloop.

5.6.1

Accumulator scaling

The user-visible accumulator is either in

LongMode (Q31) or ShortMode (Q15). For

smacloop, the mode is defined b y the mac_mode status register field. biquad only

suppor ts

ShortMode.

Pre-scaling converts the user-visible accumulator to an internal format accumulator,

as shown in Figure 5.2. The inverse operation is post-scaling which is converting an

Q14

-1

Input

-1

<< 9

>> 23

-1

Output

Coefficients: 0, L4, L8, L9

Accumulator: R23

Shifts

Q14

Q15

c[0]

c[1]

c[2

]

c[4]

c[3]

x[0]

x[1]

x[2]

y[1]

y[0]

y[2]

<< 9

<< 22

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