ADXL346ACCZ-R2 datasheet(13/40 Pages) AD

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Data Sheet

ADXL346

POWER SAVINGS

Power Modes

The ADXL346 automatically modulates its power consumption

in proportion to its output data rate, as outlined in Table 7. If

additional power savings is desired, a lower power mode is

available. In this mode, the internal sampling rate is reduced,

allowing for power savings in the 12.5 Hz to 400 Hz data rate

range at the expense of slightly greater noise. To enter low power

mode, set the LOW_POWER bit (Bit D4) in the BW_RATE

mode is shown in Table 8 for cases where there is an advantage

to using low power mode. Use of low power mode for a data rate

not shown in Table 8 does not provide any advantage over the same

data rate in normal power mode. Therefore, it is recommended

that only data rates listed in Table 8 be used in low power mode.

The current consumption values shown in Table 7 and Table 8

are for a VS of 2.6 V.

Table 7. Typical Current Consumption vs. Data Rate

(TA = 25°C, VS = 2.6 V, VDDI/O = 1.8 V)

Output Data

Rate (Hz)

Bandwidth (Hz)

Rate Code

IDD (µA)

3200

1600

1111

140

1600

800

1110

800

400

1101

140

400

200

1100

140

200

100

1011

140

100

1010

140

1001

12.5

1000

12.5

6.25

0111

6.25

3.13

0110

3.13

1.56

0101

1.56

0.78

0100

0.78

0.39

0011

0.39

0.20

0010

0.20

0.10

0001

0.10

0.05

0000

Table 8. Typical Current Consumption vs. Data Rate, Low

Power Mode (TA = 25°C, VS = 2.6 V, VDDI/O = 1.8 V)

Output Data

Rate (Hz)

Bandwidth (Hz)

Rate Code

IDD (µA)

400

200

1100

200

100

1011

100

1010

1001

12.5

1000

12.5

6.25

0111

Autosleep Mode

Additional power can be saved if the ADXL346 automatically

switches to sleep mode during periods of inactivity. To enable

this feature, set the THRESH_INACT register (Address 0x25)

and the TIME_INACT register (Address 0x26) each to a value

that signifies inactivity (the appropriate value depends on the

application), and then set the AUTO_SLEEP bit (Bit D4) and the

link bit (Bit D5) in the POWER_CTL register (Address 0x2D).

Current consumption at the sub-8 Hz data rates used in this

mode is typically 23 µA for a VS of 2.6 V.

Standby Mode

For even lower power operation, standby mode can be used.

In standby mode, current consumption is reduced to 0.2 µA

(typical). In this mode, no measurements are made. Standby mode

is entered by clearing the measure bit (Bit D3) in the

POWER_CTL register (Address 0x2D). Placing the device into

standby mode preserves the contents of FIFO.

Rev. C | Page 13 of 40

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