L6711 datasheet(10/50 Pages) STMICROELECTRONICS

10 / 50 page

Pins description and connection diagrams

L6711

10/50

23, 24

to 28

VID5,

VID0-4

Voltage IDentification pins.

Internally pulled-up to 3V, connect to SGND to program a logic ‘0’ while leave floating (as well

as pull-up with a resistor up to 3.3V) to program a logic ‘1’.

They are used to program the output voltage as specified in Table 5 and Table 6 together with

VID_SEL and to set the OVP/UVP protection thresholds accordingly.

See relevant section for details about DAC selection.

VID_SEL

VID_SELect pin. Through this pin it is possible to select the DAC table used for the regulation.

Leave floating to use a VRD10.x compliant DAC (See Table 1) while short to SGND to use a

VRM-Hammer compliant DAC (See Table 3).

See relevant section for details about DAC selection.

SS_END

Soft start end signal. It is an open collector output, set free after finishing the soft start.

Pull-up with a resistor to a voltage lower than 5V, if not used may be left floating.

SGND

All the internal references are referred to this pin. Connect it to the PCB signal ground.

PHASE3

Channel 3 HS driver return path. It must be connected to the HS3 mosfet source and provides

the return path for the HS driver of channel 3.

UGATE3

Channel 3 HS driver output.

A little series resistor helps in reducing device-dissipated power.

BOOT3

Channel 3 HS driver supply. This pin supplies the relative high side driver.

Connect through a capacitor (100nF Typ.) to the PHASE3 pin and through a diode to VCC

(cathode vs. boot).

PGND3

Channel 3 LS driver return path.

Connect to Power Ground Plane.

LGATE3

Channel 3 LS driver output.

A little series resistor helps in reducing device-dissipated power.

N.C.

Not internally connected.

VCCDR3

Channel 3 LS driver supply: it can be varied from 5V to 12V buses.

It must be connected together with other VCCDRx pins.

Filter locally with at least 1

µF ceramic cap vs. PGND3.

PGND2

Channel 2 LS driver return path.

Connect to Power Ground Plane.

LGATE2

Channel 2 LS driver output.

A little series resistor helps in reducing device-dissipated power.

VCCDR2

Channel 2 LS driver supply: it can be varied from 5V to 12V buses.

It must be connected together with other VCCDRx pins.

Filter locally with at least 1

µF ceramic cap vs. PGND2.

PHASE2

Channel 2 HS driver return path. It must be connected to the HS2 mosfet source and provides

the return path for the HS driver of channel 2.

UGATE2

Channel 2 HS driver output.

A little series resistor helps in reducing device-dissipated power.

BOOT2

Channel 2 HS driver supply. This pin supplies the relative high side driver.

Connect through a capacitor (100nF Typ.) to the PHASE2 pin and through a diode to VCC

(cathode vs. boot).

Table 1.

Pins description (continued)

N°

Name

Description

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