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AT25DF011 Datasheet(PDF) 21 Page - Renesas Technology Corp

No. de pieza AT25DF011
Descripción Electrónicos  1-Mbit, 1.65 V Minimum SPI Serial Flash Memory with Dual-Read Support
PDF  50 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

AT25DF011 Datasheet(HTML) 21 Page - Renesas Technology Corp

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DS-AT25DF011-032 Rev. J
Page 21
2023-11-14
© 2023 Renesas Electronics
AT25DF011 Datasheet
10. Security Commands
10.1 Program OTP Security Register
The device contains a specialized OTP (One-Time Programmable) Security Register that can be used for
purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key
storage, etc. The OTP Security Register is independent of the main Flash memory array and is comprised of a
total of 128 bytes of memory divided into two portions. The first 64 bytes (byte locations 0 through 63) of the OTP
Security Register are allocated as a one-time user-programmable space. Once these 64 bytes have been
programmed, they cannot be erased or reprogrammed. The remaining 64 bytes of the OTP Security Register
(byte locations 64 through 127) are factory programmed by Renesas Electronics and contain a unique value for
each device. The factory programmed data is fixed and cannot be changed.
The user-programmable portion of the OTP Security Register does not need to be erased before it is
programmed. Also, the Program OTP Security Register command operates on the entire 64-byte user-
programmable portion of the OTP Security Register at one time. Once the user-programmable space has been
programmed with any number of bytes, the user-programmable space cannot be programmed again; thus, it is not
possible to only program the first two bytes of the register and then program the remaining 62 bytes at a later time.
Before the Program OTP Security Register command can be issued, the Write Enable command must have been
previously issued to set the WEL bit in the Status Register to a logical 1. To program the OTP Security Register,
the CS pin must first be asserted and an opcode of 9Bh must be clocked into the device followed by the three
address bytes denoting the first byte location of the OTP Security Register to begin programming at. Since the
size of the user-programmable portion of the OTP Security Register is 64 bytes, the upper order address bits do
not need to be decoded by the device. Thus, address bits A23-A6 are ignored by the device, and their values can
be either a logical 1 or 0. After the address bytes have been clocked in, data can then be clocked into the device
and stored in the internal buffer.
If the starting memory address denoted by A23-A0 does not start at the beginning of the OTP Security Register
memory space (A5-A0 are not all 0), then special circumstances regarding which OTP Security Register locations
to be programmed apply. In this situation, any data sent to the device that goes beyond the end of the 64-byte
user-programmable space wrap around to the beginning of the OTP Security Register. For example, if the starting
address denoted by A23-A0 is 00003Eh, and three bytes of data are sent to the device, then the first two bytes of
data are programmed at OTP Security Register addresses 00003Eh and 00003Fh, while the last byte of data is
programmed at address 000000h. The remaining bytes in the OTP Security Register (addresses 000001h through
00003Dh) are not programmed and remain in the erased state (FFh). Also, if more than 64 bytes of data are sent
to the device, then only the last 64 bytes sent are latched into the internal buffer.
When the CS pin is deasserted, the device takes the data stored in the internal buffer and program it into the
appropriate OTP Security Register locations based on the starting address specified by A23-A0 and the number
of data bytes sent to the device. If less than 64 bytes of data were sent to the device, then the remaining bytes
within the OTP Security Register are not programmed and remain in the erased state (FFh). The programming of
the data bytes is internally self-timed and takes place in a time of tOTPP.
The three address bytes and at least one complete byte of data must be clocked into the device before the CS pin
is deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the
device stops the operation, and the user-programmable portion of the OTP Security Register is not programmed.
The WEL bit in the Status Register is reset to the logical 0 state if the OTP Security Register program cycle stops
due to an incomplete address being sent, an incomplete byte of data being sent, the CS pin being deasserted on
Table 5. OTP Security Register
Security Register Byte Number
01
. . .
62
63
64
65
. . .
126
127
One-Time User Programmable
Factory Programmed by Renesas Electronics



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