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ADA4356ABCZ Datasheet(PDF) 49 Page - Analog Devices

No. de pieza ADA4356ABCZ
Descripción Electrónicos  Programmable Transimpedance, Current to Bits Receiver μModule
PDF  61 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADA4356ABCZ Datasheet(HTML) 49 Page - Analog Devices

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Data Sheet
ADA4356
analog.com
Rev. 0
49 of 61
SERIAL PERIPHERAL INTERFACE
The ADA4356 SPI allows users to configure the internal ADC for specific functions or operations through a structured
register space. Registers are accessible via the SPI port. Register contents can be modified by writing to the port.
Bytes that can be further divided into fields constitute register memory, which is documented in the Memory Map
section. Details specified in this data sheet take precedence over the Application Note AN-877: Interfacing to High
Speed ADCs via SPI, which provides general information.
Configuration Using the SPI
The ADA4356 uses a 3-wire SPI configuration, SCLK, SDIO, and CS
̅̅̅̅
. For the functionality of each ball, see Table 16.
Table 16. Serial Port Interface Balls
MNEMONIC BALL
FUNCTION
SCLK
A11
Serial clock when CS
̅̅̅̅
is low. The serial shift clock input, which synchronizes serial
interface reads and writes.
SDIO
B11
Serial data input/output when CS
̅̅̅̅
is low. Serves as an input or output, which depends on
the instruction sent and the relative position in the timing frame.
CS
̅̅̅̅
A10
Chip select. An active low control that enables the SPI mode read and write cycles.
The falling edge of CS
̅̅̅̅
, in conjunction with the rising edge of SCLK, determines the start of the framing. An example
of the serial timing is shown in Figure 5. For the definitions of the timing parameters, see Table 4.
In the ADA4356 application, CS
̅̅̅̅
must be held low at power-up to enable SPI mode, and then kept low, which is called
streaming. CS
̅̅̅̅
can stall high between bytes to allow additional external timing.
During the instruction phase of an SPI operation, a 16-bit instruction is transmitted. Data follows the instruction
phase, and the length of this data is determined by the W0 and W1 bits (see Figure 5).
In addition to word length, the instruction phase determines whether the serial frame is a read or write operation,
which allows the serial port to both program the chip and to read the contents of the on-chip memory. The first bit
of the first byte in a multibyte serial data transfer frame indicates whether a read command or a write command is
issued. If the instruction is a readback operation, performing a readback causes the SDIO ball to change direction
from an input to an output at the appropriate point in the serial frame.
All data is composed of 8-bit words. Data can be sent in MSB first mode or in LSB first mode. MSB first mode is the
default on power-up and can be changed via the SPI port configuration register. For more details on this and other
features, refer to the Application Note AN-877: Interfacing to High Speed ADCs via SPI.
ADC SPI Start-Up Sequence
To ensure proper device operation and power dissipation, the following SPI sequence must be written after the
ADA4356 is powered on and anytime a power cycle occurs:
//SPI_WRITE(Memory Map Register,
Register Value)
SPI_WRITE(0x00, 0x00);
SPI_WRITE(0x05, 0x02);
SPI_WRITE(0x22, 0x03);



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