L99LD01 datasheet(31/69 Pages) STMICROELECTRONICS

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L99LD01

SPI functional description

3.1

Serial peripheral interface (ST SPI standard)

The SPI communication is based on a standard ST-SPI 24-bit interface, using CSN, SDI,

SDO and SCK signal lines.

Input data are shifted into SDI, MSB first while output data are shifted out on SDO, MSB

first.

During active mode, the SPI:

•

Triggers the watchdog

•

Controls the modes and status of all internal modules (incl. input and output drivers)

•

Provides driver output diagnostic

•

Provides device diagnostic (incl. over temperature warning, device operation status)

Note:

During standby modes, the SPI is generally deactivated.

The SPI can be driven by a microcontroller with its SPI peripheral running in following mode:

Figure 21. Clock polarity and clock phase

According to the standard, a generic input bit is sampled by the low to high transition of the

clock CLK and a generic output bit changes synchronously to the high to low transition of

CLK.

This device is not limited to micro controller through a built-in SPI. Only three CMOS-

compatible output pins and one input pin will be needed to communicate with the device. A

fault condition can be detected by setting CSN low. If CSN = 0, the DO pin will reflect the

global error flag (fault condition) of the device (see Figure 22). This operation does not

cause a communication error bit in the global status byte to be set.

L99LD01 Datasheet(PDF) 31 Page - STMicroelectronics