IS25LE512M-RLLA3:P-TY datasheet(134/189 Pages) ISSI

No. de pieza	IS25LE512M-RLLA3:P-TY

Descripción Electrónicos	SERIAL FLASH MEMORY 133/112MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC

PDF	189 Pages

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Fabricante Electrónico	ISSI [Integrated Silicon Solution, Inc]

Página de inicio	http://www.issi.com

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IS25LE512M

IS25WE512M

Integrated Silicon Solution, Inc.- www.issi.com

134

Rev. A6

06/16/2025

Figure 8.90 FRQDTR Sequence In SPI Mode (EDh [EXTADD=0], 3-byte address)

CE #

SCK

Instruction = EDh

CE #

SCK

3-byte Address

High Impedance

...

Mode 3

Mode 0

20 16 12

5 1

21 17 13

Data

Out

4 0

IO0

IO1

IO0

22 18 14

23 19 15

8 4

9 5

10 6

11 7

6 Dummy Cycles

IO2

IO3

IO1

IO2

IO3

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

5 1

4 0

6 2

7 3

Data

Out

Data

Out

Data

Out

Data

Out

Data

Out

Data

Out

Data

Out

Data

Out

Data

Out

5 1

4 0

6 2

7 3

Mode Bits

...

Notes:

If the mode bits=AXh (where X is don’t care), it can execute the AX read mode (without command). When the mode

bits are different from AXh, the device exits the AX read operation.

2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.11 Read Dummy Cycles.

3. Sufficient dummy cycles are required to avoid I/O contention. If the number of dummy cycles and AX bits cycles

are same, then X should be Hi-Z.

IS25LE512M-RLLA3:P-TY Datasheet(PDF) 134 Page - Integrated Silicon Solution, Inc

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