IS25LE512M-RLLA3:P-TY datasheet(87/189 Pages) ISSI

87 / 189 page

IS25LE512M

IS25WE512M

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A6

06/16/2025

8.11 QUAD INPUT PAGE PROGRAM OPERATION (PPQ, 32h/38h or 4PPQ, 34h/3Eh)

The Quad Input Page Program instruction allows up to 256/512 bytes data to be programmed into memory in a

single operation with four pins (IO0, IO1, IO2 and IO3). The destination of the memory to be programmed must be

outside the protected memory area set by the Block Protection (BP3, BP2, BP1, BP0) bits or ASP. A Quad Input

Page Program instruction which attempts to program into a page that is write-protected will be ignored.

Before the execution of Quad Input Page Program instruction, the QE bit in the Status Register

must be set to “1”

and the Write Enable Latch (WEL) must be enabled through a Write Enable (WREN) instruction.

• 32h/38h (EXTADD=0) is followed by a 3-byte address (A23-A0) or

• 32h/38h (EXTADD=1) is followed by a 4-byte address (A31-A0) or

• 34h/3Eh is followed by a 4-byte address (A31-A0)

Program operation will start immediately after the CE# is brought high, otherwise the Quad Input Page Program

instruction will not be executed. The internal control logic automatically handles the programming voltages and

timing. The progress or completion of the program operation can be determined by reading the WIP bit. If the WIP

bit is “1”, the program operation is still in progress. If WIP bit is “0”, the program operation has completed.

If more than 256/512 bytes data are sent to a device, the address counter rolls over within the same page, the

previously latched data are discarded, and the last 256/512 bytes data are kept to be programmed into the page.

The starting byte can be anywhere within the page. When the end of the page is reached, the address will wrap

around to the beginning of the same page. If the data to be programmed are less than a full page, the data of all

other bytes on the same page will remain unchanged.

Note:

A program operation can alter “1”s into “0”s, but an erase operation is required to change “0”s back to “1”s.

When ECC is ON, ECC protection applied on each 64-bit boundary, so the device only allows a single

programming operation to each 8-byte boundary between erase operations. Incremental programming is not

allowed and ignored.

Figure 8.25 Quad Input Page Program operation (32h/38h [EXTADD=0], 3-byte address)

Instruction = 32h/38h

CE #

SCK

3-byte Address

High Impedance

...

Mode 3

Mode 0

IO0

IO1

Data In 2

IO2

IO3

...

Data In 1

...

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