LM4947, LM4947TLEVAL

SNAS349D – JUNE 2006 – REVISED MAY 2013

www.ti.com

PIN DESCRIPTIONS

Bump

Name

Description

A1

RIN2

Right Input Channel 2 or Right Differential Input –

A2

LIN1

Left Input Channel 1 or Left Differential Input +

A3

MIN+

Mono Channel Non-inverting Input

A4

RHP3D1

Right Headphone 3D Input 1

A5

RHP3D2

Right Headphone 3D Input 2

B1

RIN1

Right Input Channel 1 or Right Differential Input +

B2

LIN2

Left Input Channel 2 or Left Differential Input–

B3

MIN-

Mono Channel Inverting Input

B4

LHP3D1

Left Headphone 3D Input 2

B5

LHP3D2

Left Headphone 3D Input 1

C1

ADDR

Address Identification

C2

SDA

Serial Data Input

C3

SCL

Serial Clock Input

C4

CBYPASS

Half-Supply Bypass Capacitor

C5

VOC

Headphone return bias output

D1

AVDD

Analog Power Supply

D2

LSVDD

Loudspeaker Power Supply

D3

I2CVDD

I2C Interface Power Supply

D4

AVDD

Analog Power Supply

D5

RHP

Right Headphone Output

E1

LS-

Loudspeaker Output Negative

E2

GND

Ground

E3

LS+

Loudspeaker Output Positive

E4

GND

Ground

E5

LHP

Left Headphone Output

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

4

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