SN74LS273

3

FUNCTIONAL DESCRIPTION

The SN74LS273 is an 8-Bit Parallel Register with a

common Clock and common Master Reset.

When the MR input is LOW, the Q outputs are LOW,

independent of the other inputs. Information meeting the

setup and hold time requirements of the D inputs is

transferred to the Q outputs on the LOW-to-HIGH transition

of the clock input.

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

VIH

Input HIGH Voltage

2.0

V

Guaranteed Input HIGH Voltage for

All Inputs

VIL

Input LOW Voltage

0.8

V

Guaranteed Input LOW Voltage for

All Inputs

VIK

Input Clamp Diode Voltage

– 0.65

– 1.5

V

VCC = MIN, IIN = – 18 mA

VOH

Output HIGH Voltage

2.7

3.5

V

VCC = MIN, IOH = MAX, VIN = VIH

or VIL per Truth Table

VO

Output LOW Voltage

0.25

0.4

V

IOL = 4.0 mA

VCC = VCC MIN,

VIN =VIL or VIH

VOL

Output LOW Voltage

0.35

0.5

V

IOL = 8.0 mA

VIN = VIL or VIH

per Truth Table

I

Input HIGH Current

20

µA

VCC = MAX, VIN = 2.7 V

IIH

Input HIGH Current

0.1

mA

VCC = MAX, VIN = 7.0 V

IIL

Input LOW Current

– 0.4

mA

VCC = MAX, VIN = 0.4 V

IOS

Short Circuit Current (Note 1)

–20

– 100

mA

VCC = MAX

ICC

Power Supply Current

27

mA

VCC = MAX

Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)

Limits

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

fMAX

Maximum Input Clock Frequency

30

40

MHz

Figure 1

tPHL

Propagation Delay, MR to Q Output

18

27

ns

Figure 2

tPLH

tPHL

Propagation Delay, Clock to Output

17

18

27

27

ns

Figure 1

AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)

Limits

Symbol

Parameter

Min

Typ

Max

Unit

Test Conditions

tw

Pulse Width, Clock or Clear

20

ns

Figure 1

ts

Data Setup Time

20

ns

Figure 1

th

Hold Time

5.0

ns

Figure 1

trec

Recovery Time

25

ns

Figure 2

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