ADAU1761BCPZ-R7 datasheet(38/92 Pages) AD

38 / 92 page

Data Sheet

ADAU1761

CONTROL PORTS

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Rev. F | 38 of 92

I2C Read and Write Operations

Figure 51 shows the format of a single-word write operation. Every

ninth clock pulse, the ADAU1761 issues an acknowledge by pulling

SDA low.

Figure 52 shows the format of a burst mode write sequence.

This figure shows an example of a write to sequential single-byte

registers. The ADAU1761 increments its subaddress register after

every byte because the requested subaddress corresponds to a

Figure 53 shows the format of a single-word read operation. Note

that the first R/W bit is 0, indicating a write operation. This is

because the subaddress still needs to be written to set up the

internal address. After the ADAU1761 acknowledges the receipt of

the subaddress, the main must issue a repeated start command

followed by the chip address byte with the R/W bit set to 1 (read).

This causes the ADAU1761 SDA to reverse and begin driving data

back to the main. The main then responds every ninth pulse with an

acknowledge pulse to the ADAU1761.

Figure 54 shows the format of a burst mode read sequence. This

figure shows an example of a read from sequential single-byte

registers. The ADAU1761 increments its subaddress register after

every byte because the requested subaddress corresponds to a

always decodes the subaddress and sets the auto-increment circuit

so that the address increments after the appropriate number of

bytes.

Figure 51 to Figure 54 use the following abbreviations:

S = start bit

P = stop bit

AM = acknowledge by main

AS = acknowledge by subordinate

Figure 51. Single-Word I2C Write Format

Figure 52. Burst Mode I2C Write Format

Figure 53. Single-Word I2C Read Format

Figure 54. Burst Mode I2C Read Format

ADAU1761BCPZ-R7 Datasheet(PDF) 38 Page - Analog Devices