MPQ1925

– 100V, 4A, HIGH-FREQUENCY, HALF-BRIDGE GATE DRIVER

MPQ1925 Rev. 1.0

MonolithicPower.com

10

3/8/2022

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REFERENCE DESIGN CIRCUITS

Half-Bridge Converter

In a half-bridge converter topology, the high-side

MOSFET (HS-FET) and low-side MOSFET (LS-

FET) are driven alternately with a dead time (DT)

inserted between their respective on periods. INT

and INL are driven with alternating signals via the

pulse-width modulation (PWM) controller. The

input voltage (VIN) can rise up to 100V when in a

half-bridge topology (see Figure 5 in the Typical

Application Circuits section on page 13).

Two-Switch Forward Converter

In a two-switch forward converter topology, the

HS-FET and LS-FET start up and shutdown

simultaneously. During current-mode control, the

INH and INL input signals sense the output

voltage (VOUT) and output current (IOUT) via a

PWM controller.

The

Schottky

diodes

clamp

the

power

transformer

’s reverse swing, and must be rated

for VIN, which can rise up to 100V (see Figure 6

in the Typical Application Circuits section on

page 13).

Active-Clamp Forward Converter

In an active-clamp forward converter topology,

the HS-FET and LS-FET are driven alternately.

The HS-FET and reset capacitor (CRESET) reset

the power transformer without loss.

Active-clamp forward converter topologies are

optimal for duty cycles exceeding 50%. The

MPQ1925 may not be able to operate at 100V in

an active-clamp forward topology (see Figure 7 in

the Typical Application Circuits section on page

13).