PCK2011DL datasheet(3/11 Pages) PHILIPS

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Philips Semiconductors

Preliminary specification

PCK2011

Direct Rambus

™ Clock Generator

1999 Jan 19

Table 1. PIN DESCRIPTION

Name

Type

Function

Notes

VDDLR

RefV

Reference for REFCLK

Connect to CK133

REFCLK

Reference clock

Connect to CK133

VDDP

Pwr

VDD for PLL

3.3V Supply

GNDP

GND

GND for PLL

Ground

GNDl

GND

GND for control inputs

Ground

PCLKM

Phase Detector Input

Connect to Controller

SYNCLKN

Phase Detector Input

Connect to Controller

GNDC

GND

GND for Phase Aligner

Ground

VDDC

Pwr

VDD for Phase Aligner

3.3V Supply

VDDLPD

RefV

Reference for P.D. Inputs

Connect to Controller

STOPB

Active Low Output Disable

Connect to Controller

PWRDnB

Active Low power down

3.3V CMOS

Mode control input

3.3V CMOS

MULT1

PLL multiplier select

3.3V CMOS

MULT0

PLL multiplier select

3.3V CMOS

VDDO

Pwr

VDD for clock outputs

3.3V Supply

GNDO

GND

GND for clock outputs

Ground

CLKB

Out

Output Clock (complement)

Connect to Rambus Channel

N/C

Not used

Not connected (floating)

CLK

Out

Output Clock

Connect to Rambus Channel

GNDO

GND

GND for clock outputs

Ground

VDDO

Pwr

VDD for clock outputs

3.3V Supply

Mode Control

3.3V CMOS

Mode Control

3.3V CMOS

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