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AT80C51RB2-3CSIM Datasheet(PDF) 63 Page - ATMEL Corporation |
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AT80C51RB2-3CSIM Datasheet(HTML) 63 Page - ATMEL Corporation |
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63 / 83 page ![]() 64 AT80C51RD2/AT83C51Rx2 4113B–8051–03/05 Power-off Flag The Power-off flag allows the user to distinguish between a “cold start” reset and a “warm start” reset. A cold start reset is the one induced by V CC switch-on. A warm start reset occurs while V CC is still applied to the device and could be generated for example by an exit from power-down. The Power-off flag (POF) is located in PCON register (Table 47). POF is set by hard- ware when V CC rises from 0 to its nominal voltage. The POF can be set or cleared by software allowing the user to determine the type of reset. Table 47. PCON Register PCON - Power Control Register (87h) Reset Value = 00X1 0000b Not bit addressable 7654 3210 SMOD1 SMOD0 - POF GF1 GF0 PD IDL Bit Number Bit Mnemonic Description 7SMOD1 Serial port Mode bit 1 Set to select double baud rate in mode 1, 2 or 3. 6SMOD0 Serial port Mode bit 0 Cleared to select SM0 bit in SCON register. Set to select FE bit in SCON register. 5- Reserved The value read from this bit is indeterminate. Do not set this bit. 4POF Power-off Flag Cleared to recognize next reset type. Set by hardware when V CC rises from 0 to its nominal voltage. Can also be set by software. 3GF1 General purpose Flag Cleared by user for general purpose usage. Set by user for general purpose usage. 2GF0 General purpose Flag Cleared by user for general purpose usage. Set by user for general purpose usage. 1PD Power-down mode bit Cleared by hardware when reset occurs. Set to enter power-down mode. 0IDL Idle mode bit Cleared by hardware when interrupt or reset occurs. Set to enter idle mode. |
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