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M25P10-AVMP3/X Datasheet(PDF) 40 Page - STMicroelectronics

No. de pieza M25P10-AVMP3/X
Descripción Electrónicos  1 Mbit, low voltage, Serial Flash memory with 50MHz SPI bus interface
PDF  49 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M25P10-AVMP3/X Datasheet(HTML) 40 Page - STMicroelectronics

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DC and AC parameters
M25P10-A
40/49
Table 19.
AC Characteristics (40MHz Operation, Device Grade 6)
40MHz available for products marked since week 20 of 2004, only(1)
Test conditions specified in Table 10 and Table 12
1.
Details of how to find the date of marking are given in Application Note, AN1995.
Symbol
Alt.
Parameter
Min.
Typ.
Max.
Unit
fC
fC
Clock Frequency for the following instructions:
FAST_READ, PP, SE, BE, DP, RES, WREN,
WRDI, RDSR, WRSR
D.C.
40
MHz
fR
Clock Frequency for READ instructions
D.C.
20
MHz
tCH
(2)
2.
tCH + tCL must be greater than or equal to 1/ fC
tCLH Clock High Time
11
ns
tCL
(2)
tCLL Clock Low Time
11
ns
tCLCH
(3)
3.
Value guaranteed by characterization, not 100% tested in production.
Clock Rise Time(4) (peak to peak)
4.
Expressed as a slew-rate.
0.1
V/ns
tCHCL
(3)
Clock Fall Time(4) (peak to peak)
0.1
V/ns
tSLCH
tCSS S Active Setup Time (relative to C)
5
ns
tCHSL
S Not Active Hold Time (relative to C)
5
ns
tDVCH
tDSU Data In Setup Time
2
ns
tCHDX
tDH
Data In Hold Time
5
ns
tCHSH
S Active Hold Time (relative to C)
5
ns
tSHCH
S Not Active Setup Time (relative to C)
5
ns
tSHSL
tCSH S Deselect Time
100
ns
tSHQZ
(3)
tDIS
Output Disable Time
9
ns
tCLQV
tV
Clock Low to Output Valid
9
ns
tCLQX
tHO
Output Hold Time
0
ns
tHLCH
HOLD Setup Time (relative to C)
5
ns
tCHHH
HOLD Hold Time (relative to C)
5
ns
tHHCH
HOLD Setup Time (relative to C)
5
ns
tCHHL
HOLD Hold Time (relative to C)
5
ns
tHHQX
(3)
tLZ
HOLD to Output Low-Z
9
ns
tHLQZ
(3)
tHZ
HOLD to Output High-Z
9
ns
tWHSL
(5)
5.
Only applicable as a constraint for a WRSR instruction when SRWD is set to 1.
Write Protect Setup Time
20
ns
tSHWL
(5)
Write Protect Hold Time
100
ns
tDP
(3)
S High to Deep Power-down Mode
3
µs
tRES1
(3)
S High to Standby Mode without Electronic
Signature Read
3 or 30(6)
6.
It is 30µs in devices produced with the “X” process technology. Details of how to find the process letter on
the device marking are given in the Application note AN1995.
µs
tRES2
(3)
S High to Standby Mode with Electronic
Signature Read
1.8 or 30(6)
µs



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