UPD750004 datasheet(38/86 Pages) RENESAS

No. de pieza	UPD750004

Descripción Electrónicos	MOS INTEGRATED CIRCUIT

PDF	86 Pages

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Fabricante Electrónico	RENESAS [Renesas Technology Corp]

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38 / 86 page

µPD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)

Data Sheet U10738EJ3V2DS

9. RESET FUNCTION

The

µPD750008 is reset with the external reset signal (RESET) or the reset signal received from the basic interval

timer/watchdog timer. When either reset signal is input, the internal reset signal is generated. Fig. 9-1 shows the

configuration of the reset circuit.

Fig. 9-1

Configuration of Reset Functions

When the RESET signal is generated, all hardware is initialized as indicated in Table 9-1. Fig. 9-2 shows the reset

operation timing.

Fig. 9-2

Reset Operation by Generation of RESET Signal

Note Either of the following two values can be selected by a mask option:

217/fX (21.8 ms at 6.0 MHz, 31.3 ms at 4.19 MHz)

215/fX (5.46 ms at 6.0 MHz, 7.81 ms at 4.19 MHz)

WDTM

RESET

Internal reset signal

Reset signal from basic

interval timer/watchdog timer

Internal bus

RESET signal is generated

Operating mode or

standby mode

HALT mode

Operating mode

Internal reset operation

Wait

Note

UPD750004 Datasheet(PDF) 38 Page - Renesas Technology Corp