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853S111AI Datasheet(PDF) 13 Page - Renesas Technology Corp |
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853S111AI Datasheet(HTML) 13 Page - Renesas Technology Corp |
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13 / 21 page ![]() LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-LVPECL/ECL FANOUT BUFFER 13 Rev A 6/30/15 853S111AI DATA SHEET Schematic Example This application note provides a general design guide using 853S111AI LVPECL buffer. Figure 5 shows a schematic example of the 853S111AI LVPECL clock buffer. In this example, the input is driven by an LVPECL driver. CLK_SEL is set at logic high to select PCLK0/nPCLK0 input. Figure 5. 853S111AI Example LVPECL Clock Output Buffer Schematic C4 0.1uF C6 (Option) 0.1u Zo = 50 R7 50 Zo = 50 R2 50 VCC R1 50 VCC VCC=3.3V C7 (Option) 0.1u R3 50 (U1-16) U1 ICS853111 1 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 VCC CLK_SEL PCLK0 nPCLK0 VBB PCLK1 nPCLK1 VEE nQ6 Q6 nQ5 Q5 nQ4 Q4 nQ3 Q3 R4 1K Zo = 50 C2 0.1uF (U1-9) R8 50 Zo = 50 Ohm C8 (Option) 0.1u + - C5 0.1uF R10 50 R11 50 3.3V LVPECL + - VCC (U1-32) R13 50 C1 0.1uF Zo = 50 Ohm R9 50 C3 0.1uF (U1-25) VCC Zo = 50 (U1-1) |
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