Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

853S111AI Datasheet(PDF) 7 Page - Renesas Technology Corp

No. de pieza 853S111AI
Descripción Electrónicos  Skew, 1-to-10, Differential-to-LVPECL/ECL Fanout Buffer
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

853S111AI Datasheet(HTML) 7 Page - Renesas Technology Corp

Back Button 853S111AI Datasheet HTML 3Page - Renesas Technology Corp 853S111AI Datasheet HTML 4Page - Renesas Technology Corp 853S111AI Datasheet HTML 5Page - Renesas Technology Corp 853S111AI Datasheet HTML 6Page - Renesas Technology Corp 853S111AI Datasheet HTML 7Page - Renesas Technology Corp 853S111AI Datasheet HTML 8Page - Renesas Technology Corp 853S111AI Datasheet HTML 9Page - Renesas Technology Corp 853S111AI Datasheet HTML 10Page - Renesas Technology Corp 853S111AI Datasheet HTML 11Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 21 page
background image
LOW SKEW, 1-TO-10, DIFFERENTIAL-TO-LVPECL/ECL FANOUT
BUFFER
7
Rev A 6/30/15
853S111AI DATA SHEET
Additive Phase Jitter
The spectral purity in a band at a specific offset from the fundamental
compared to the power of the fundamental is called the dBc Phase
Noise. This value is normally expressed using a Phase noise plot and
is most often the specified plot in many applications. Phase noise is
defined as the ratio of the noise power present in a 1Hz band at a
specified offset from the fundamental frequency to the power value of
the fundamental. This ratio is expressed in decibels (dBm) or a ratio
of the power in the 1Hz band to the power in the fundamental. When
the required offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the fundamental.
By investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the entire
time record of the signal. It is mathematically possible to calculate an
expected bit error rate given a phase noise plot.
As with most timing specifications, phase noise measurements has
issues relating to the limitations of the equipment. Often the noise
floor of the equipment is higher than the noise floor of the device. This
is illustrated above. The device meets the noise floor of what is
shown, but can actually be lower. The phase noise is dependent on
the input source and measurement equipment.
The source generator "Rhode & Schwartz SMA 100A Signal
Generator 9kHz – 6GHz as external input to a Hewlett Packard 8133A
3GHz Pulse Generator".
Additive Phase Jitter @ 155.52MHz
12kHz to 20MHz = 0.07ps (typical)
Offset from Carrier Frequency (Hz)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com