Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

DP83255AVF Datasheet(PDF) 33 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza DP83255AVF
Descripción Electrónicos  PLAYER Device (FDDI Physical Layer Controller)
PDF  96 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83255AVF Datasheet(HTML) 33 Page - National Semiconductor (TI)

Back Button DP83255AVF Datasheet HTML 29Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 30Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 31Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 32Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 33Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 34Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 35Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 36Page - National Semiconductor (TI) DP83255AVF Datasheet HTML 37Page - National Semiconductor (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 33 / 96 page
background image
50 Registers (Continued)
CURRENT RECEIVE STATE REGISTER (CRSR)
(Continued)
Bit
Symbol
Description
D5
RES
RESERVED
Reserved for future use The reserved bit is set to 0
Note
Users are discouraged from using this bit An attempt to write into this bit will cause the PLAYER device to ignore the
CBUS write cycle and set the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register (ICR) to 1
D6
RES
RESERVED
Reserved for future use The reserved bit is set to 0
Note
Users are discouraged from using this bit An attempt to write into this bit will cause the PLAYER device to ignore the
CBUS write cycle and set the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register (ICR) to 1
D7
RES
RESERVED
Reserved for future use The reserved bit is set to 0
Note
Users are discouraged from using this bit An attempt to write into this bit will cause the PLAYER device to ignore the
CBUS write cycle and set the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register (ICR) to 1
33



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com