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HC05RC16GRS/D Datasheet(PDF) 17 Page - NXP Semiconductors |
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HC05RC16GRS/D Datasheet(HTML) 17 Page - NXP Semiconductors |
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17 / 122 page  General Description Features MC68HC05RC16 — Rev. 3.0 General Release Specification General Description • Low-Power Reset Pin • 20 Bidirectional I/O Lines (Four Additional I/O Lines Available for Bond Out in 44-Lead PLCC Package) • Mask Programmable Pullups and Interrupts on Eight Port Pins (PB0–PB7) • High-Current Infrared (IR) Drive Pin • High-Current Port Pin (PC0) • Power-Saving Stop and Wait Modes • Mask Selectable Options: – COP Watchdog Timer – STOP Instruction Disable – Edge-Sensitive or Edge- and Level-Sensitive Interrupt Trigger – Port B Pullups for Keyscan • Illegal Address Reset • ROM Security Feature NOTE: A line over a signal name indicates an active low signal. For example, RESET is active low. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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