ST25TB02K datasheet(13/47 Pages) STMICROELECTRONICS

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4.2

32-bit binary counters

The two 32-bit binary counters are located at block addresses 5 and 6. The ST25TB02K uses dedicated logic

that only allows the update of a counter if the new value is lower than the previous one. This feature allows the

application to count down by steps of 1 or more. The initial value in Counter 5 is FFFF FFFEh and is FFFF FFFFh

in Counter 6. When the reached value is 0000 0000h, the counter is empty and cannot be reloaded. For each

counter 5 and 6, the update is done by issuing the Write_block command. The Write_block command writes the

new 32-bit value to the counter block address. Table 6 shows examples of how the counters operate.

The counter programming cycles are protected by automated antitearing logic. This function allows the counter

value to be protected in case of power down within the programming cycle. In case of power down, the counter

value is not updated and the previous value continues to be stored.

Table 6. Binary counter (addresses 5 to 6)

Block Address

MSB

32-bit block

LSB

Description

b31

b24 b23

b16 b15

b8 b7

32-bit Boolean area

Count down

counter

32-bit Boolean area

Figure 14. Countdown example (binary format)

...

Initial data

1-unit decrement

b31

...

1-unit decrement

8-unit decrement

Increment not allowed

The counter with block address 6 controls the reload mode used to reset the resettable OTP area (addresses 0

to 4). Bits b31 to b21 act as an 11-bit Reload counter; whenever one of these 11 bits is updated, the ST25TB02K

detects the change and adds an Erase cycle to the Write_block command for locations 0 to 4 (see the Block 0 - 4:

resettable OTP area paragraph).

The Erase cycle remains active until a Power-off or a Select command is issued.

The ST25TB02K’s resettable OTP area can be reloaded up to 2 047 times (211-1).

ST25TB02K

32-bit binary counters

DS11469 - Rev 7

page 13/47

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