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AX88780 Datasheet(PDF) 6 Page - ASIX Electronics Corporation |
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AX88780 Datasheet(HTML) 6 Page - ASIX Electronics Corporation |
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6 / 49 page ![]() AX88780 1.0 Introduction 1.1 General Description AX88780 supports full-duplex or half-duplex operation at 10/100 Mbps speed with auto-negotiation or manual setting. The AX88780 has two built-in synchronous SRAMs for buffering packet. The one is 32K bytes for receiving packets from Ethernet; the other is 8K-bytes for transmitting packets from host system to Ethernet. The AX88780 also has 256 bytes built-in configuration registers. For software programming, the total address space used in AX88780 is 64K bytes in 32-bit mode and 16K bytes in 16-bit mode. Because AX88780 is a SRAM-like device, AX88780 could be treated as a SRAM device and be attached to SRAM controller of system. Therefore, system can execute DMA cycles to gain the highest performance. AX88780 needs 2 clock sources. One is the same to host system clock, and the operating frequency is from 40 MHz to 100 MHz. The other is 25Mhz for internal PHY running in MII mode. 1.2 AX88780 Block Diagram Figure 1 : AX88780 block diagram 6 ASIX ELECTRONICS CORPORATION |
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