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DRF100 Datasheet(PDF) 4 Page - Advanced Power Technology |
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DRF100 Datasheet(HTML) 4 Page - Advanced Power Technology |
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4 / 12 page ![]() Figure 3, Leading Edge throughput Delay ~ 32ns = Figure 4, Trailing Edge throughput Delay ~ 33ns = Figure 5, 30MHz Output into 50Ω Figure 6, Output Rise Time = 2.8ns Figure 7, Output Fall Time = 2.0ns All waveforms on this page, Figures 3 thru 7, were taken using the test circuit of Figure 1, with the following test conditions: 1. +VDD = 15V 2. Control input 5.0V/50Ω 3. Load = 50Ω DRF100 |
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