STPM32TR datasheet(70/121 Pages) STMICROELECTRONICS

70 / 121 page

Theory of operation

STPM32, STPM33, STPM34

70/121

DS10272 Rev 8

Software reset

Writing SW Reset configuration bit in DSP_CR3 brings the configuration registers to their

default values. Data registers are not reset. This bit is automatically cleared after this action.

8.6.2

SPI peripheral

The device implements a full-duplex communication protocol using MISO, MOSI ports for

data exchange, SCL for clock port, SCS port for data exchange activation and SYN for

internal register data latching and resetting, when no data activation is set (SCS in off-state).

Latching and resetting can also be performed by setting the related bits in DSP_CR3

With reference to the general SPI protocol, the peripheral is configured to work according to

the following settings: cpol=1, cpha=1.

SPI control register

US_REG1 register contains 16-bits with all the configuration parameters of t SPI and UART

interfaces of the STPM3x.Table 25 describes SPI related bits:

LSBfirst: endianness of data-byte transmission and reception

CRCenable: enables the optional CRC feature

CRCPolynomial: default polynomial used is 0x07 (x8+x2+x+1)

SPI timings

Any single transaction timing follows the scheme in Figure 5 on page 13.

For consecutive writing transactions, a minimum time interval of 4

s has to be taken into

account in order to avoid overrun issues.

For latch and consecutive read transactions a minimum time interval of 4

s has to be taken

into account in order to avoid overrun issues.

Examples

All frames in the following examples do not contain CRC byte, which has to be added just in

case the feature has not been disabled previously. After that CRC has been disabled, the

frame consists of four bytes only.

To write bits from 31 to 16 (most significant bits) in row 1 with data byte 0xABCD and read

row 2 in the following transaction, the first four bytes of the transmission (without CRC) are:

04_03_CD_AB

Table 25. SPI control register

Bit position in row

Name

Description

Default value

LSBfirst

Little(1) or big(0) - endian for bit

transmission in data-byte

CRCenable

Enable/disable CRC feature

[7:0]

CRCPolynomial

Polynomial used to validate transmitted

and received data

0x07

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