VV5430 datasheet(9/33 Pages) STMICROELECTRONICS

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VV5430

Device Details

CD5430F-A

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Key:

OA- Analogue output

IA -

Analogue input

OD- Digital output

ID -

Digital input

↓-Digital output with internal pull-down

↑ - Digital input with internal pull-up

BI - Bidirectional

LST

Line start. Active high pulse (start of active video lines).

Pixel sample clock. Qualifies video output for external image capture.

PVB

Pixel sample clock bar. Inverse of PV.

CPE

↓

Pixel sample clock enable. Default CPE = 0 i.e. PV/PVB disabled.

FST

Field start. Synchronises external image capture.

ODD

Odd/even field signal. (ODD = 1 for odd fields, ODD = 0 for even)

DIGITAL CONTROL SIGNALS

SAB1

↓

Higher bit of two least significant bits of device address on serial interface.

SIN

↓

Used to reset video timing control logic without resetting any other part of

VV5430. Resets video logic on the falling edge of the SIN pulse.

SCE

↓

Scan mode enable - only relevant to test mode.

LIN

↓

Gamma corrected or Linear output. LIN = 0, gamma corrected output,

LIN = 1, linear output. Default is gamma. LIN = 0 can be overridden via serial

interface.

SAB0

↓

Lower bit of two least significant bits of device address on serial interface.

AEC

↑

Automatic exposure control. AEC = 1, auto exposure is enabled; AEC = 0 auto

exposure

and auto gain control are disabled. AEC = 1 can be overridden via

serial interface.

AGC

↑

Automatic gain control enable. AGC = 1, auto-gain is enabled (if AEC = 1);

AGC = 0, auto-gain is disabled. AGC can be overridden via serial interface.

CCIR

↑

Select default video mode for power-on. CCIR = 1 for CCIR video. EIA video

mode is selected when CCIR = 0. Default is CCIR if unconnected

BKLIT

↓

Normal or Backlit exposure control mode. BKLIT = 0, normal mode. BKLIT = 1,

backlit mode. Default is normal. BKLIT state can be overridden via serial inter-

face. See Exposure Control for details.

RESETB

↑

Active low camera reset. All camera systems are reset to power-on state.

SCI

↓

Scan chain input - only relevant to test mode.

SCL

↑

Serial bus clock (input only). Must be generated by comms. host.

SDA

↑

Serial bus data (bidirectional, open drain).

Signal

Name

Typ

Description

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