ADP1048WARQZ-R7 datasheet(57/82 Pages) AD

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Data Sheet

ADP1048W

EEPROM_PAGE_ERASE REGISTER

Table 59. Register 0xD4—EEPROM_PAGE_ERASE

Bits

Bit Name

R/W

Description

[7:0]

Page erase

Perform a page erase on the selected EEPROM page. (Wait 35 ms after each page erase operation.)

EEPROM must first be unlocked. Page 0 and Page 1 erase are allowed only in manufacturing test mode.

EEPROM_PASSWORD REGISTER

Table 60. Register 0xD5—EEPROM_PASSWORD

Bits

Bit Name

R/W

Description

[7:0]

EEPROM

password

Write the password to this register to unlock EEPROM and/or to change the EEPROM password.

TRIM_PASSWORD REGISTER

Table 61. Register 0xD6—TRIM_PASSWORD

Bits

Bit Name

R/W

Description

[7:0]

Trim password

Write the password to this register to unlock the trim registers for write access. Write the trim password

twice (default 0x00) to unlock the register; write any other value to exit.

EEPROM_INFO COMMAND

Code 0xF1, block readwrite. This command reads the manufacturer data from the EEPROM.

CS_FAST_OCP_RESPONSE REGISTER

This register instructs the device on actions to take due to a fast overcurrent protection condition.

Table 62. Register 0xFE00—CS_FAST_OCP_RESPONSE

Bits

Bit Name

R/W

Description

[7:6]

Response

R/W

These bits determine the device response to a fast overcurrent protection condition.

Bit 7

Bit 6

Response

Ignore (still terminate the PWM pulse).

Allow the number of switching cycles specified in Bits[5:4], then shut down and

soft start (use the soft start delay time specified in Register 0x5C, Bits[2:0]).

Allow the number of switching cycles specified in Bits[5:4] (terminating the PWM

pulse each time), then shut down and wait for the PSON signal to soft start.

Disable the PWM output after the number of switching cycles specified in Bits[5:4]

and wait for the flag to be cleared.

[5:4]

N-time

R/W

These bits determine the number of switching cycles allowed before the device disables the PWM

output after a fast overcurrent condition is detected.

Bit 5

Bit 4

Number of Switching Cycles

[3:0]

RSVD

Reserved.

Rev. 0 | Page 57 of 82

ADP1048WARQZ-R7 Datasheet(PDF) 57 Page - Analog Devices

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