ADP1048WARQZ-R7 datasheet(56/82 Pages) AD

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ADP1048W

Data Sheet

READ_PIN REGISTER

This register returns the input power (W) in power linear mode format (X = Y × 2N).

Table 51. Register 0x97—READ_PIN

Bits

Bit Name

R/W

Description

[15:11]

Exponent

Return the exponent (N) used in power linear mode format (X = Y × 2N). The exponent (N) is set in the

exponent register (Register 0xFE39, Bits[2:0]). The exponent is in twos complement format.

[10:8]

High bits

Mantissa high bits (Y[10:8]) used in power linear mode format (X = Y × 2N).

[7:0]

Low byte

Mantissa low byte (Y[7:0]) used in power linear mode format (X = Y × 2N).

PMBUS_REVISION REGISTER

Table 52. Register 0x98—PMBUS_REVISION

Bits

Bit Name

R/W

Description

[7:0]

Revision

Return the revision of PMBus that the device is compliant with.

MFR_ID REGISTER

Table 53. Register 0x99—MFR_ID

Bits

Bit Name

R/W

Description

[7:0]

MFR_ID

Return the manufacturer ID.

MFR_MODEL REGISTER

Table 54. Register 0x9A—MFR_MODEL

Bits

Bit Name

R/W

Description

[7:0]

Model

Return the manufacturer model number.

MFR_REVISION REGISTER

Table 55. Register 0x9B—MFR_REVISION

Bits

Bit Name

R/W

Description

[7:0]

Revision

Return the manufacturer revision number.

EEPROM_DATA_00 Through EEPROM_DATA_15 COMMANDS

Code 0xB0 through Code 0xBF, read/write block. The EEPROM_DATA_00 through EEPROM_DATA_15 commands are used to read

data from the EEPROM and write data to the EEPROM. EEPROM_DATA_00 reads from and writes to Page 0 of the EEPROM main

block; EEPROM_DATA_01 reads from and writes to Page 1 of the EEPROM main block, and so on.

EEPROM_CRC_CHKSUM REGISTER

Table 56. Register 0xD1—EEPROM_CRC_CHKSUM

Bits

Bit Name

R/W

Description

[7:0]

CRC checksum

Return the CRC checksum value from the EEPROM download operation.

EEPROM_NUM_RD_BYTES REGISTER

Table 57. Register 0xD2—EEPROM_NUM_RD_BYTES

Bits

Bit Name

R/W

Description

[7:0]

Number of read

bytes returned

R/W

These bits set the number of read bytes returned when using the EEPROM_DATA_xx commands.

EEPROM_ADDR_OFFSET REGISTER

Table 58. Register 0xD3—EEPROM_ADDR_OFFSET

Bits

Bit Name

R/W

Description

[15:0]

Address offset

R/W

These bits set the address offset of the current EEPROM page.

Rev. 0 | Page 56 of 82

ADP1048WARQZ-R7 Datasheet(PDF) 56 Page - Analog Devices

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