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SH7041A Datasheet(PDF) 364 Page - Renesas Technology Corp

No. de pieza SH7041A
Descripción Electrónicos  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
PDF  923 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7041A Datasheet(HTML) 364 Page - Renesas Technology Corp

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326
Counting mode selection
Select counter clock
Periodic counter
Select counter
clear source
Select output
compare register
Set period
Start counting
Start counting
Free-running counter
Periodic counter
Free-running counter
5
5
4
3
2
1
Figure 12.7 Procedure for Selecting the Counting Operation
Free-Running Counter Operation Example: A reset of the MTU timer counters (TCNT) leaves
them all in the free-running mode. When a bit in the TSTR is set to 1, the corresponding timer
counter operates as a free-running counter and begins to increment. When the count overflows
from H'FFFF–H'0000, the TCFV bit in the timer status register (TSR) is set to 1. If the TCIEV bit
in the timer’s corresponding timer interrupt enable register (TIER) is set to 1, the MTU will make
an interrupt request to the interrupt controller. After the TCNT overflows, counting continues from
H'0000. Figure 12.8 shows an example of free-running counter operation.
CST bit
TCNT value
Time
H'FFFF
H'0000
TCFV
Figure 12.8 Free-Running Counter Operation



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