84025EM

www.icst.com/products/hiperclocks.html

REV. A APRIL 16, 2003

7

Integrated

Circuit

Systems, Inc.

ICS84025

PRELIMINARY

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS84025 provides sepa-

rate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

should be individually connected to the power supply

plane through vias, and bypass capacitors should be

used for each pin. To achieve optimum jitter performance,

power supply isolation is required.

Figure 2 illustrates how

a 24

Ω resistor along with a 10µF and a .01µF bypass

capacitor should be connected to each V

24

Ω

V

DDA

10

µF

.01

µF

3.3V

.01

µF

V

DD

A crystal can be characterized for either series or parallel

mode operation. The ICS84025 has a built-in crystal oscillator

circuit. This interface can accept either a series or parallel

crystal without additional components and generate

frequencies with accuracy suitable for most applications.

Additional accuracy can be achieved by adding two small

capacitors C1 and C2 as shown in

Figure 3.

C2

22pF

C1

18pF

25MHz

X1

ICS84025

20

21

XTAL2

XTAL1