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MCP6V51-E/MS Datasheet(PDF) 21 Page - Microchip Technology |
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MCP6V51-E/MS Datasheet(HTML) 21 Page - Microchip Technology |
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21 / 43 page ![]() 2018 Microchip Technology Inc. DS20006136A-page 21 MCP6V51 4.0 APPLICATIONS The MCP6V51 is designed for precision applications with requirements for small packages and low power. Its wide supply voltage range and low quiescent current make the MCP6V51 devices ideal for industrial applications. 4.1 Overview of Zero-Drift Operation Figure 4-1 shows a simplified diagram of the MCP6V51 zero-drift op amp. This diagram will be used to explain how slow voltage errors are reduced in this architecture (much better VOS, VOS/TA (TC1), CMRR, PSRR, AOL and 1/f noise). FIGURE 4-1: Simplified Zero-Drift Op Amp Functional Diagram. 4.1.1 BUILDING BLOCKS The Main Amplifier is designed for high gain and bandwidth, with a differential topology. Its main input pair (+ and - pins at the top left) is used for the higher frequency portion of the input signal. Its auxiliary input pair (+ and - pins at the bottom left) is used for the low-frequency portion of the input signal and corrects the op amp’s input offset voltage. Both inputs are added together internally. The Auxiliary Amplifier, Chopper Input Switches and Chopper Output Switches provide a high DC gain to the input signal. DC errors are modulated to higher frequencies, while white noise is modulated to low frequency. The Low-Pass Filter reduces high-frequency content, including harmonics of the chopping clock. The Output Buffer drives external loads at the VOUT pin (VREF is an internal reference voltage). The Oscillator runs at fOSC1 = 200 kHz. Its output is divided by two, to produce the chopping clock rate of fCHOP =100 kHz. The internal Power-on Reset (POR) starts the part in a known good state, protecting against power supply brown-outs. The Digital Control block controls switching and POR events. 4.1.2 CHOPPING ACTION Figure 4-2 shows the amplifier connections for the first phase of the chopping clock and Figure 4-3 shows the connections for the second phase. Its slow voltage errors alternate in polarity, making the average error small. FIGURE 4-2: First Chopping Clock Phase; Equivalent Amplifier Diagram. FIGURE 4-3: Second Chopping Clock Phase; Equivalent Amplifier Diagram. VIN+ VIN- Main Buffer VOUT VREF Amp. Output NC Aux. Amp. Chopper Input Switches Chopper Output Switches Oscillator Low-Pass Filter POR Digital Control + - + - + - + - + - + - VIN+ VIN- Main Amp. NC Aux. Amp. Low-Pass Filter + - + - + - + - + - VIN+ VIN- Main Amp. NC Aux. Amp. Low-Pass Filter + - + - + - + - + - |
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