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TL072CD Datasheet(PDF) 16 Page - Texas Instruments |
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TL072CD Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 75 page  6.17 Electrical Characteristics: TL07xH For VS = (VCC+) – (VCC–) = 4.5 V to 40 V (±2.25 V to ±20 V) at TA = 25°C, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VO UT = VS / 2, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OFFSET VOLTAGE VOS Input offset voltage ±1 ±4 mV TA = –40°C to 125°C ±5 dVOS/dT Input offset voltage drift TA = –40°C to 125°C ±2 µV/ ℃ PSRR Input offset voltage versus power supply VS = 5 V to 40 V, VCM = VS / 2 TA = –40°C to 125°C ±1 ±10 μV/V Channel separation f = 0 Hz 10 µV/V INPUT BIAS CURRENT IB Input bias current ±1 ±120 pA DCK and DBV packages ±1 ±300 pA TA = –40°C to 125°C (1) ±5 nA IOS Input offset current ±0.5 ±120 pA DCK and DBV packages ±0.5 ±250 pA TA = –40°C to 125°C (1) ±5 nA NOISE EN Input voltage noise f = 0.1 Hz to 10 Hz 9.2 μVPP 1.4 µVRMS eN Input voltage noise density f = 1 kHz 37 nV/√Hz f = 10 kHz 21 iN Input current noise f = 1 kHz 80 fA/√Hz INPUT VOLTAGE RANGE VCM Common-mode voltage range (VCC–) + 1.5 (VCC+) V CMRR Common-mode rejection ratio VS = 40 V, (VCC–) + 2.5 V < VCM < (VCC+) – 1.5 V 100 105 dB CMRR Common-mode rejection ratio TA = –40°C to 125°C 95 dB CMRR Common-mode rejection ratio VS = 40 V, (VCC–) + 2.5 V < VCM < (VCC+) 90 105 dB CMRR Common-mode rejection ratio TA = –40°C to 125°C 80 dB INPUT CAPACITANCE ZID Differential 100 || 2 MΩ || pF ZICM Common-mode 6 || 1 TΩ || pF OPEN-LOOP GAIN AOL Open-loop voltage gain VS = 40 V, VCM = VS / 2, (VCC–) + 0.3 V < VO < (VCC+) – 0.3 V TA = –40°C to 125°C 118 125 dB AOL Open-loop voltage gain VS = 40 V, VCM = VS / 2, RL = 2 kΩ, (VCC–) + 1.2 V < VO < (VCC+) – 1.2 V TA = –40°C to 125°C 115 120 dB FREQUENCY RESPONSE GBW Gain-bandwidth product 5.25 MHz SR Slew rate VS = 40 V, G = +1, CL = 20 pF 20 V/μs tS Settling time To 0.1%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20 pF 0.63 μs To 0.1%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20 pF 0.56 To 0.01%, VS = 40 V, VSTEP = 10 V , G = +1, CL = 20 pF 0.91 To 0.01%, VS = 40 V, VSTEP = 2 V , G = +1, CL = 20 pF 0.48 Phase margin G = +1, RL = 10kΩ, CL = 20 pF 56 ° Overload recovery time VIN × gain > VS 300 ns TL071, TL071H, TL071A, TL071B TL072, TL072H, TL072A, TL072B TL074, TL074H, TL074A, TL074B, TL072M, TL074M SLOS080Q – SEPTEMBER 1978 – REVISED JUNE 2021 www.ti.com 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: TL071 TL071H TL071A TL071B TL072 TL072H TL072A TL072B TL074 TL074H TL074A TL074B TL072M TL074M |
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