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LTC4230IGN Datasheet(PDF) 31 Page - Linear Technology |
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LTC4230IGN Datasheet(HTML) 31 Page - Linear Technology |
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31 / 36 page ![]() 31 LTC4230 4230f APPLICATIO S I FOR ATIO bias current 1N4691 zener diode is chosen to protect the system. Here, the zener diode is connected from VCC to the LTC4230’s FILTER pin. If the input voltage to the system is greater than 6.8V during start-up, the voltage on the FILTER pin is pulled higher than its 1.19V thresh- old. As a result, the GATE n pin is not allowed to ramp and the second timing cycle will not commence until the supply overvoltage condition is removed. Should the supply overvoltage condition occur during normal op- eration, internal control logic would trip the electronic circuit breaker and the GATE would be pulled to ground, shutting off the external pass transistor. If a lower supply overvoltage threshold is desired, use a zener diode with a smaller breakdown voltage. A timing diagram for illustrating LTC4230 operation under a high side overvoltage condition is shown in Figure 23. The start-up sequence in this case (between Time Points 1 and 2) is identical to any other start-up sequence under normal operating conditions. At Time Point 2, the input supply voltage causes the zener diode to conduct thereby forcing VFILTER > 1.19V. At Time Point 3, FAULT is asserted low and the TIMER pin voltage ramps down. At Time Point 4, the LTC4230 checks if VFILTER < 1.19V. FAULT is asserted low (but not latched) to indicate a start-up failure. Only if the input overvoltage condition is removed before Time Point 5 does the start-up sequence resume at the second timing cycle. At this point in time, the GATE n pin voltage is allowed to ramp up, FAULT is pulled to logic high and the circuit breaker is armed. Should, at any time after Time Point 5, a supply overvoltage condition develop (VFILTER > 1.26V), the electronic circuit breaker will trip, the GATE n will be pulled low to turn off the external MOSFET and FAULT will be asserted low and latched. Low Side (Output) Overvoltage Protection A zener diode can be used in a similar fashion to detect/ protect the system against a supply overvoltage condition on the load (or low) side of the pass transistor. In this case, the zener diode is connected from the load to the LTC4230’s FILTER pin, as shown in Figure 24. An additional diode, D1, prevents the FILTER pin from pulling low during output short-circuit. Figure 25 illustrates the timing dia- gram for a low side output overvoltage condition. In this example, the LTC4230 can only sense the overvoltage supply condition after Time Point 5 and the GATE n pin has ramped up to its nominal operating value. After Time Point 5, a supply voltage fault occurs at the load and the zener diode conducts, causing VFILTER to increase. At Time Point 6, VFILTER is greater than 1.26V, the circuit breaker trips, GATE pulls to ground and FAULT asserts low and is latched. In either case, the LTC4230 can be configured to auto- matically initiate a start-up sequence. Please refer to the section on AutoRetry After a Fault for additional information. PCB LAYOUT CONSIDERATIONS For proper operation of the LTC4230’s circuit breaker function, a 4-wire Kelvin connection to the sense resistors is highly recommended. A recommended PCB layout for the sense resistor, the power MOSFET and the GATE drive components around the LTC4230 is illustrated in Fig- ure 26. In Hot Swap applications where load currents can reach 10A or more, narrow PCB tracks exhibit more resistance than wider tracks and operate at more elevated temperatures. Since the sheet resistance of 1 ounce copper foil is approximately 0.54m Ω/square, track resis- tances add up quickly in high current applications. Thus, to keep PCB track resistance and temperature rise to a minimum, PCB track width must be appropriately sized. Consult Appendix A of LTC Application Note 69 for details on sizing and calculating trace resistances as a function of copper thickness. In the majority of applications, it will be necessary to use plated-through vias to make circuit connections from component layers to power and ground layers internal to the PC board. For 1 ounce copper foil plating, a good starting point is 1A of DC current per via, making sure the via is properly dimensioned so that solder completely fills any void. For other plating thicknesses, check with your PCB fabrication facility. |
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