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IS25LP032D-RGLA3:P Datasheet(PDF) 19 Page - Integrated Silicon Solution, Inc |
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IS25LP032D-RGLA3:P Datasheet(HTML) 19 Page - Integrated Silicon Solution, Inc |
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19 / 118 page ![]() IS25LP032D IS25WP032D Integrated Silicon Solution, Inc.- www.issi.com 19 Rev. A12 08/04/2020 Table 5.3 JEDEC Basic Flash Parameter Table (Continued) Description Address (Byte) Address (Bit) Data Exit Deep Power-down to next operation delay 3V 67h:65h 12:8 00010b 1.8V 00100b Exit Deep Power-down to next operation delay Units 14:13 01b Exit Deep Power-down Instruction 22:15 ABh Enter Deep Power-down Instruction 30:23 B9h Deep Power-down Supported 31 0b 4-4-4 mode disable sequences (QPIDI) 69h:68h 3:0 1010b 4-4-4 mode enable sequences (QPIEN) 8:4 00100b 0-4-4 Mode Supported 9 1b 0-4-4 Mode Exit Method 15:10 110000b 0-4-4 Mode Entry Method: 6Ah 19:16 1100b Quad Enable Requirements (QER) 22:20 010b Hold or RESET Disable 23 0b Reserved 6Bh 31:24 FFh Volatile or Non-Volatile Register and Write Enable (WREN) Instruction for Status Register 1 6Ch 6:0 1100001b Reserved 7 1b Soft Reset and Rescue Sequence Support 6Eh:6Dh 13:8 110000b Exit 4-Byte Addressing 23:14 110000000 0b Enter 4-Byte Addressing 6Fh 31:24 10000000b |
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