LP1115 datasheet(8/10 Pages) POWER

8 / 10 page

LP1115-01

Dec.-2019

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Page 8 of 10

Preliminary Datasheet

LP1115

Power Supply Decoupling

The LP1115 can source and sink relatively large

currents to the gate pins of the external MOSFETs.

In order to maintain a constant and stable supply

voltage (VCC) a low ESR capacitor should be placed

near the power and ground pins. A 1μF to 4.7μF

multilayer ceramic capacitor is usually sufficient.

Input Pins

The PWM pin of the LP1115 has internal protection

for Electro Static Discharge (ESD), but in normal

operation they present relatively high input

impedance. If the PWM controller does not have

internal pull-down resistors, they should be added

externally to ensure that the driver outputs do not go

high before the controller has reached its under

voltage lockout threshold.

Bootstrap Circuit

The bootstrap circuit uses a charge storage capacitor

(CBST) and the external diode. Selection of these

components can be done after the high-side

MOSFET has been chosen. The bootstrap capacitor

must have a voltage rating that is able to withstand

twice the maximum supply voltage. A minimum 50V

rating is recommended. The capacitance is

determined using the following equation:

Where QGATE is the total gate charge of the high-side

MOSFET, and ΔVBST is the voltage droop allowed

on the high-side MOSFET drive.

For example, an external MOSFET has a total gate

charge of about 30nC. For an allowed droop of

300mV, the required bootstrap capacitance is 100nF.

A good quality ceramic capacitor should be used.

The bootstrap diode must be rated to withstand the

maximum supply voltage plus any peak ringing

voltages that may be present on SW. The average

forward current can be estimated by:

Where fMAX is the maximum switching frequency of

the controller. The peak surge current rating should

be checked in-circuit, since this is dependent on the

source impedance of the 12V supply and the ESR of

CBST.

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