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STM32F469 Datasheet(PDF) 72 Page - STMicroelectronics |
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STM32F469 Datasheet(HTML) 72 Page - STMicroelectronics |
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72 / 91 page ![]() LTDC application examples AN4861 72/91 DocID029237 Rev 2 LTDC Clocks and timings configuration System clock configuration In this example the system clock is configured as shown in Figure 44, and with below configuration: – Use of internal HSI RC where main PLL is used as system source clock. – HCLK @ 200 MHz so Cortex®-M7 and LTDC are both running @ 200 MHz. Note: HCLK is set to 200 MHz but not 216 MHz, this is to set the SDRAM_FMC at its maximum speed of 100 MHz with HCLK/2 prescaler. In order to configure the system clock using STM32CubeMX, select the clock configuration tab as shown in Figure 43. Figure 43. STM32CubeMX: clock configuration tab Then, to get the system clock HCLK @ 200 MHz, set the PLLs and the prescalers in the clock configuration tab as shown in the Figure 44. Figure 44. STM32CubeMX: System clock configuration |
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