CS61880 datasheet(46/70 Pages) CIRRUS

46 / 70 page

CS61880

DS450PP3

16.1.14 Exit1-IR

This is a temporary state. The test data register se-

lected by the current instruction retains its previous

value.

16.1.15 Pause-IR

The pause state allows the test controller to tempo-

rarily halt the shifting of data through the instruc-

tion register.

16.1.16 Exit2-IR

This is a temporary state. The test data register se-

lected by the current instruction retains its previous

value.

16.1.17 Update-IR

The instruction shifted into the instruction register

is latched into the parallel output from the shift-reg-

ister path on the falling edge of TCK. When the

new instruction has been latched, it becomes the

current instruction. The test data registers selected

by the current instruction retain their previous val-

ue.

16.2 Instruction Register (IR)

The 3-bit Instruction register selects the test to be

performed and/or the data register to be accessed.

The valid instructions are shifted in LSB first and

are listed in Table 13:

16.2.1 EXTEST

The EXTEST instruction allows testing of off-chip

circuitry and board-level interconnect. EXTEST

connects the BSR to the TDI and TDO pins.

16.2.2 SAMPLE/PRELOAD

The SAMPLE/PRELOAD instruction samples all

device inputs and outputs. This instruction places

the BSR between the TDI and TDO pins. The BSR

is loaded with samples of the I/O pins by the Cap-

ture-DR state.

16.2.3 IDCODE

The IDCODE instruction connects the device iden-

tification register to the TDO pin. The device iden-

tification code can then be shifted out TDO using

the Shift-DR state.

16.2.4 BYPASS

The BYPASS instruction connects a one TCK de-

lay register between TDI and TDO. The instruction

is used to bypass the device.

Table 13. JTAG Instructions

IR CODE

INSTRUCTION

000

EXTEST

100

SAMPLE/PRELOAD

110

IDCODE

111

BYPASS

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