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STA450A Datasheet(PDF) 27 Page - STMicroelectronics |
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STA450A Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 66 page ![]() 27/66 STA450A contain the fractional values for the Audio Fractional PLL for the Fs = 44.1KHz family. The registers have to be programmed before the start_up of the DSP. HOST_APLL441_XDIV Address : 0x57 Type : R/W Software Reset : NA Hardware Reset : NA HOST_APLL441_MDIV Address : 0x58 Type : R/W Software Reset : NA Hardware Reset : NA HOST_APLL441_NDIV Address : 0x59 Type : R/W Software Reset : NA Hardware Reset : NA Description The HOST_APLL441_XDIV, HOST_APLL441_MDIV and HOST_APLL441_NDIV registers are used to configure the X, M and N divider of the Audio Fractional PLL for the Fs = 44.1KHz family. The registers have to be programmed before the start_up of the DSP ENABLE_IT432 Address : 0x5A Type : R/W Software Reset : NA Hardware Reset : NA Description Enabling of the Audio Fractional PLL control through the external 432ms interrupt on pin PLL_SYNC. 0: Disabled 1: Enabled 7654 3210 52 7654 3210 53 7654 3210 54 7654 3210 5A |
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