LTC3370 datasheet(30/44 Pages) LINER

30 / 44 page

LTC3372

Rev. A

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APPLICATIONS INFORMATION

Both the VOUT and SENSE– pins are monitored for over-

voltage conditions. An overvoltage condition is detected

when either pin is 7.5% above the nominal output volt-

age. When this condition is sensed, the top MOSFET is

turned off and the bottom MOSFET is turned on until the

overvoltage condition is cleared. The bottom MOSFET

remains on continuously for as long as the overvoltage

condition persists; if VOUT returns to a safe level, normal

operation automatically resumes.

AshortedtopMOSFETwillresultinahighcurrentcondition

which will open the system fuse. The switching regulator

will regulate properly with a leaky top MOSFET by altering

the duty cycle to accommodate the leakage.

Minimum On-Time Considerations

The minimum on-time, tON(MIN), is the smallest time dura-

tion that the HV controller is capable of turning on the top

MOSFET. It is determined by internal timing delays and the

gate charge required to turn on the top MOSFET. Low duty

cycle applications may approach this minimum on-time

limit and care should be taken to ensure that:

tON(MIN) <

VOUT

VIN(f)

If the duty cycle falls below what can be accommodated

by the minimum on-time, the controller will begin to skip

cycles. The output voltage will continue to be regulated,

but the ripple voltage and current will increase.

The minimum on-time of top FET is typically 60ns. How-

ever, as the peak sense voltage decreases the minimum

on-time gradually increases. This is of particular concern

in forced continuous applications with low ripple current

at light loads. If the duty cycle drops below the minimum

on-time limit in this situation, a significant amount of cycle

skipping can occur with correspondingly larger current

and voltage ripple.

Efficiency Considerations

The percent efficiency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efficiency and which change would

produce the most improvement. Percent efficiency can

be expressed as:

%Efficiency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc. are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, four main sources usually account for most of

the losses in HV regulator: 1) IC VIN current, 2) INTVCC

regulator current, 3) I2R losses, 4) topside MOSFET

transition losses.

1. The VIN current is the DC supply current given in the

Electrical Characteristics table, which excludes MOS-

FET driver and control currents. VIN current typically

results in a small (<0.1%) loss.

2. INTVCC current is the sum of the MOSFET driver and

control currents. The MOSFET driver current results

from switching the gate capacitance of the power

MOSFETs. Each time a MOSFET gate is switched

from low to high to low again, a packet of charge, dQ,

moves from INTVCC to ground. The resulting dQ/dt is

a current out of INTVCC that is typically much larger

than the control circuit current. In continuous mode,

IGATECHG = f(QT + QB), where QT and QB are the gate

charges of the topside and bottom side MOSFETs.

InapplicationswhenVOUT/EXTVCCissetto5V,INTVCC

is supplied through VOUT/EXTVCC. This scales the VIN

current required for the driver and control circuits by

a factor of (Duty Cycle)/(Efficiency). For example, in a

20V to 5V application, 10mA of INTVCC current results

in approximately 2.5mA of VIN current. This reduces

the midcurrent loss from 10% or more (if the driver

was powered directly from VIN) to only a few percent.

3. I2RlossesarepredictedfromtheDCresistancesofthe

fuse (if used), MOSFET, inductor, current sense resis-

tor and input and output capacitor ESR. In continuous

mode the average output current flows through L and

RSENSE, but is chopped between the topside MOSFET

and the synchronous MOSFET. If the two MOSFETs

have approximately the same RDS(ON), then the re-

sistance of one MOSFET can simply be summed with

the resistances of L, RSENSE and ESR to obtain I2R

High Voltage Buck Controller

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