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GD25LB128DSJS Datasheet(PDF) 29 Page - GigaDevice Semiconductor (Beijing) Inc.

No. de pieza GD25LB128DSJS
Descripción Electrónicos  1.8V Uniform Sector Dual and Quad Serial Flash
PDF  75 Pages
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Fabricante Electrónico  GIGADEVICE [GigaDevice Semiconductor (Beijing) Inc.]
Página de inicio  http://www.gigadevice.com/
Logo GIGADEVICE - GigaDevice Semiconductor (Beijing) Inc.

GD25LB128DSJS Datasheet(HTML) 29 Page - GigaDevice Semiconductor (Beijing) Inc.

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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LB128D
29
7.12.
Quad I/O Word Fast Read (E7H)
The Quad I/O Word Fast Read command is similar to the Quad I/O Fast Read command except that the lowest
address bit (A0) must be equal 0 and there are only 2-dummy clocks. The command sequence is shown in followed Figure13.
The first byte addressed can be at any location. The address is automatically incremented to the next higher address after
each byte of data is shifted out.
Quad I/O Word Fast Read with
“Continuous Read Mode”
The Quad I/O Word Fast Read command can further reduce command overhead through setting the
“Continuous
Read Mode
” bits (M7-0) after the input 3-byte address (A23-A0). If the “Continuous Read Mode” bits (M5-4) = (1, 0), then
the next Quad I/O Word Fast Read command (after CS# is raised and then lowered) does not require the E7H command
code. The command sequence is shown in followed Figure13. If the
“Continuous Read Mode” bits (M5-4) do not equal to
(1, 0), the next command requires the first E7H command code, thus returning to normal operation. A
“Continuous Read
Mode
” Reset command can be used to reset (M5-4) before issuing normal command.
Figure13. Quad I/O Word Fast Read Sequence Diagram (M5-4
≠ (1, 0))
Figure13a. Quad I/O Word Fast Read Sequence Diagram (M5-4= (1, 0))
Command
0
1
2
3
4
5
6
7
E7H
CS#
SCLK
IO0
IO1
8
9 10 11 12 13 14 15
4
0
4
0
4
0
4
0
16 17 18 19 20 21 22 23
4
0
4
0
5
1
5
1
5
1
5
1
5
1
5
1
A23-16 A15-8 A7-0
M7-0
6
2
6
2
6
2
6
2
6
2
6
2
7
3
7
3
7
3
7
3
7
3
7
3
IO2
IO3
4
5
6
7
Dummy
Byte1 Byte2
4
0
5
1
6
2
7
3
Byte3
0
1
2
3
4
5
6
7
CS#
SCLK
8
9 10 11 12 13 14 15
IO0
IO1
IO2
IO3
4
0
4
0
5
1
5
1
6
2
6
2
7
3
7
3
4
0
4
0
5
1
5
1
6
2
6
2
7
3
7
3
4
0
4
0
5
1
5
1
6
2
6
2
7
3
7
3
4
5
6
7
A23-16 A15-8 A7-0
M7-0 Dummy Byte1 Byte2
4
0
5
1
6
2
7
3
Byte3



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