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SL4017B Datasheet (PDF) - System Logic Semiconductor

SL4017B Datasheet PDF - System Logic Semiconductor
No. de pieza SL4017B
Descarga  SL4017B Descarga

Tamaño del archivo   68.85 Kbytes
Page   8 Pages
Fabricante Electrónico  SLS [System Logic Semiconductor]
Página de inicio  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Descripción Electrónicos Counter/Divider

SL4017B Datasheet (PDF)

Go To PDF Page Descarga Datasheet
SL4017B Datasheet PDF - System Logic Semiconductor

No. de pieza SL4017B
Descarga  SL4017B Click to download

Tamaño del archivo   68.85 Kbytes
Page   8 Pages
Fabricante Electrónico  SLS [System Logic Semiconductor]
Página de inicio  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor
Descripción Electrónicos Counter/Divider

SL4017B Datasheet (HTML) - System Logic Semiconductor

SL4017B Datasheet HTML 1Page - System Logic Semiconductor SL4017B Datasheet HTML 2Page - System Logic Semiconductor SL4017B Datasheet HTML 3Page - System Logic Semiconductor SL4017B Datasheet HTML 4Page - System Logic Semiconductor SL4017B Datasheet HTML 5Page - System Logic Semiconductor SL4017B Datasheet HTML 6Page - System Logic Semiconductor SL4017B Datasheet HTML 7Page - System Logic Semiconductor SL4017B Datasheet HTML 8Page - System Logic Semiconductor

SL4017B Detalles de producto

Counter/Divider
High-Voltage Silicon-Gate CMOS

The SL4017B is 5-stage Johnson counter having 10 decoded outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.
The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded outputs are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes one cycle every 10 clock input cycles in the SL4017B.

● Operating Voltage Range: 3.0 to 18 V
● Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  




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