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ST72F324J Datasheet(PDF) 123 Page - STMicroelectronics

No. de pieza ST72F324J
Descripción Electrónicos  8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
PDF  156 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72F324J Datasheet(HTML) 123 Page - STMicroelectronics

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12.5 CLOCK AND TIMING CHARACTERISTICS
Subject to general operating conditions for VDD, fCPU, and TA.
12.5.1 General Timings
12.5.2 External Clock Source
Figure 67. Typical Application with an External Clock Source
Notes:
1. Data based on typical application software.
2. Time measured between interrupt event and interrupt vector fetch.
∆t
c(INST) is the number of tCPU cycles needed to finish
the current instruction execution.
3. Data based on design simulation and/or technology characteristics, not tested in production.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
tc(INST)
Instruction cycle time
2
3
12
tCPU
fCPU=8MHz
250
375
1500
ns
tv(IT)
Interrupt reaction time 2)
tv(IT) = ∆tc(INST) + 10
10
22
tCPU
fCPU=8MHz
1.25
2.75
µs
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOSC1H
OSC1 input pin high level voltage
see Figure 67
VDD-1
VDD
V
VOSC1L
OSC1 input pin low level voltage
VSS
VSS+1
tw(OSC1H)
tw(OSC1L)
OSC1 high or low time 3)
5
ns
tr(OSC1)
tf(OSC1)
OSC1 rise or fall time 3)
15
IL
OSCx Input leakage current
VSS≤VIN≤VDD
±1
µA
OSC1
OSC2
fOSC
EXTERNAL
ST72XXX
CLOCK SOURCE
Not connected internally
VOSC1L
VOSC1H
tr(OSC1)
tf(OSC1)
tw(OSC1H)
tw(OSC1L)
IL
90%
10%



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