ST72F324J datasheet(121/156 Pages) STMICROELECTRONICS

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SUPPLY CURRENT CHARACTERISTICS (Cont’d)

12.4.5 HALT and ACTIVE-HALT Modes

Notes:

1. All I/O pins in push-pull 0 mode (when applicable) with a static value at VDD or VSS (no load), CSS and LVD disabled.

Data based on characterization results, tested in production at VDD max. and fCPU max.

2. Data based on characterisation results, not tested in production. All I/O pins in push-pull 0 mode (when applicable) with

a static value at VDD or VSS (no load); clock input (OSC1) driven by external square wave, LVD disabled. To obtain the

total current consumption of the device, add the clock source consumption (Section 12.5.3 and Section 12.5.4).

12.4.6 Supply and Clock Managers

The previous current consumption specified for the ST7 functional operating modes over temperature

range does not take into account the clock source current consumption. To get the total device consump-

tion, the two current values must be added (except for HALT mode).

Notes:

1. Data based on characterisation results, not tested in production.

2. Data based on characterization results done with the external components specified in Section 12.5.3 and Section

12.5.4, not tested in production.

3. As the oscillator is based on a current source, the consumption does not depend on the voltage.

Symbol

Parameter

Conditions

Typ

Max

Unit

IDD

Supply current in HALT mode 1)

VDD=5.5V

-40°C

≤T

A≤+85°C

µA

-40°C

≤T

A≤+125°C

IDD

Supply current in ACTIVE-HALT mode 2)

fOSC = 16 MHz, VDD= 5V

650

No max.

guaran-

teed

µA

Symbol

Parameter

Conditions

Typ

Max 1)

Unit

IDD(RCINT) Supply current of internal RC oscillator

625

µA

IDD(RCEXT)

Supply current of external RC oscillator 2)

see Section

12.5.4 on page

126

IDD(RES)

Supply current of resonator oscillator 2) & 3)

see Section

12.5.3 on page

124

IDD(PLL)

PLL supply current

VDD= 5V

360

IDD(CSS)

Clock security system supply current

VDD= 5V

250

IDD(LVD)

LVD supply current

HALT mode, VDD= 5V

150

300

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