WM8976 datasheet(57/83 Pages) WOLFSON

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Preliminary Technical Data

WM8976

PTD Rev 2.0 February 2005

Figure 29 Right Justified Audio Interface (assuming n-bit word length)

In I

2S mode, the MSB is available on the second rising edge of BCLK following a LRC transition. The

other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency

and sample rate, there may be unused BCLK cycles between the LSB of one sample and the MSB of

the next.

Figure 30 I

2S Audio Interface (assuming n-bit word length)

In DSP/PCM mode, the left channel MSB is available on either the 1

st (mode B) or 2nd (mode A)

rising edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data

immediately follows left channel data. Depending on word length, BCLK frequency and sample rate,

there may be unused BCLK cycles between the LSB of the right channel data and the next sample.

In device master mode, the LRC output will resemble the frame pulse shown in Figure 31 and Figure

32. In device slave mode, Figure 33 and Figure 34, it is possible to use any length of frame pulse

less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period

before the rising edge of the next frame pulse.

Figure 31 DSP/PCM Mode Audio Interface (mode A, LRP=0, Master)

WM8976 Datasheet(PDF) 57 Page - Wolfson Microelectronics plc