AT49BV802AT datasheet(8/29 Pages) ATMEL

8 / 29 page

AT49BV802A(T)

3405C–FLASH–9/04

Figure 1. Data Polling Algorithm

(Configuration Register = 00)

Notes:

1. VA = Valid address for programming. During a sec-

tor erase operation, a valid address is any sector

address within the sector being erased. During

chip erase, a valid address is any non-protected

sector address.

2. I/O7 should be rechecked even if I/O5 = “1”

because I/O7 may change simultaneously with

I/O5.

START

Read I/O7 - I/O0

Addr = VA

I/O7 = Data?

I/O5 = 1?

Read I/O7 - I/O0

Addr = VA

I/O7 = Data?

Program/Erase

Operation Not

Successful, Write

Product ID

Exit Command

YES

Program/Erase

Operation

Successful,

Device in

Read Mode

Figure 2. Data Polling Algorithm

(Configuration Register = 01)

Note:

1. VA = Valid address for programming. During a sec-

tor erase operation, a valid address is any sector

address within the sector being erased. During

chip erase, a valid address is any non-protected

sector address.

START

Read I/O7 - I/O0

Toggle Bit =

Toggle?

I/O5 = 1?

Read I/O7 - I/O0

Twice

Toggle Bit =

Toggle?

Program/Erase

Operation Not

Successful, Write

Product ID

Exit Command

Program/Erase

Operation

Successful,

Write Product

ID Exit Command

YES

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