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CLC408ALC Datasheet(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de pieza CLC408ALC
Descripción Electrónicos  Comlinear CLC408 High-Speed, Low-Power Line Driver
PDF  12 Pages
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Fabricante Electrónico  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
Logo NSC - National Semiconductor (TI)

CLC408ALC Datasheet(HTML) 4 Page - National Semiconductor (TI)

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Typical Performance Characteristics (A
v = +2, Rf = 1kΩ, RL = 100Ω, VCC = +5V, T = 25°C, CLC408AJ; unless specified)
Long Term Settling Time
Time (s)
0.4
-0.4
1
µ
1m
1
0
10
µ
100
µ
10m
100m
-0.2
0.2
Closed Loop Output Resistance
Frequency (Hz)
100
0.1
10M
100M
10
1
Gain Flatness & Linear Phase Deviation
Frequency (Hz)
1M
10M
Gain
Phase
Small Signal Pulse Response
Time (10ns/div)
0.20
0.10
-0.20
0
-0.10
Av+2
Av-2
Large Signal Pulse Response
Time (10ns/div)
4.0
2.0
-4.0
0
-2.0
Av+2
Av-2
Short Term Settling Time
Time (s)
0.2
0.1
-0.2
0
20n
100n
0
-0.1
Vout = 2Vstep
40n
60n
80n
IBI, IBN, VOS vs. Temperature
Temperature (
°C)
7.0
6.0
1.0
-50
0
100
5.0
4.0
3.0
2.0
VOS
3.5
3.0
1.5
1.0
0.5
2.5
2.0
50
IBI
IBN
Settling Time vs. Capacitive Load
CL (F)
70
60
30
20
10
100p
20p
1000p
50
40
60
50
20
10
0
40
30
Rs
0.05%
0.1%
CLC408 OPERATION
The CLC408 has a current-feedback (CFB) architecture
built in an advanced complementary bipolar process.
The key features of current-feedback are:
s
AC bandwidth is independent of voltage gain
s
Inherently unity-gain stability
s
Frequency response may be adjusted with
feedback resistor (Rf in Figures 1-3)
s
High slew rate
s
Low variation in performance for a wide range
of gains, signal levels and loads
s
Fast settling
Current-feedback operation can be explained with a
simple model. The voltage gain for the circuits in Figures 1
and 2 is approximately:
where:
s
Av is the DC voltage gain
s
Rf is the feedback resistor
s
Z(j
ω) is the CLC408’s open-loop
transimpedance gain
s
is the loop gain
The denominator of the equation above is approximately
1
at
low
frequencies.
Near
the
-3dB
corner
frequency, the interaction between Rf and Z(jω)
dominates the circuit performance. Increasing Rf does
the following:
s
Decreases loop gain
s
Decreases bandwidth
s
Reduces gain peaking
s
Lowers pulse response overshoot
s
Affects frequency response phase linearity
V
V
A
1
R
Zj
o
in
v
f
=
+ ()ω
Zj
Rf
ω
()



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