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STA321MPL1 Datasheet(PDF) 13 Page - STMicroelectronics |
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STA321MPL1 Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 80 page  DocID029389 Rev 1 13/80 STA321MPL1 Microphone interface 80 3 Microphone interface 3.1 PDM clock generator (for microphones) To correctly start the device in microphone processor mode, it is necessary to set registers 0x00 to 0x9B and register 0x5D to 0x01. The CKOUT pin can be used to properly provide a clock source for digital microphones. When the mikemode bit is asserted (reg 0x5D bit 0), the CKOUT generator is automatically configured to generate a clock with sys_clk/32 frequency (corresponding to a PDM over- sampling rate of 64). For example, considering a base sample frequency of: Fs = 44.1 kHz XTI = 11.289 MHz (user provided) System clock = 90.3168 MHz (system generated) Clock out = 2.8224 MHz (system generated) Fs = 48.0 kHz XTI = 12.288 MHz (user provided) System clock= 98.304 MHz (system generated) Clock out = 3.072 MHz (system generated) Technical details The clock generator creates two output clocks with the same frequency, CKOUT270 has a 270 degrees phase shift with respect to CKOUT. One is exported outside the device and used to clock the microphones, the other is used internally to clock the PDM interface of the STA321MPL1. |
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