873991 datasheet(13/18 Pages) IDT

13 / 18 page

873991

www.idt.com

REV. A 8/25/15

873991

LOW VOLTAGE, LVCMOS/

LVPECL-TO-LVPECL/ECL CLOCK GENERATOR

3. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load.

LVPECL output driver circuit and termination are shown in Figure 6.

To calculate worst case power dissipation into the load, use the following equations which assume a 50

Ω load, and a termination

voltage of V

CCO- 2V.

•

For logic high, VOUT = V

OH_MAX = VCCO_MAX – 0.9V

CCO_MAX - VOH_MAX) = 0.9V

•

For logic low, VOUT = V

OL_MAX = VCCO_MAX – 1.7V

CCO_MAX - VOL_MAX) = 1.7V

Pd_H is power dissipation when the output drives high.

Pd_L is the power dissipation when the output drives low.

Pd_H = [(V

OH_MAX – (VCCO_MAX - 2V))/RL] * (VCCO_MAX - VOH_MAX) = [(2V - (VCCO_MAX - VOH_MAX

))/R

L] * (VCCO_MAX - VOH_MAX) =

[(2V - 0.9V)/50

Ω] * 0.9V = 19.8mW

Pd_L = [(V

OL_MAX – (VCCO_MAX - 2V))/RL] * (VCCO_MAX - VOL_MAX) = [(2V - (VCCO_MAX - VOL_MAX

))/R

L] * (VCCO_MAX - VOL_MAX) =

[(2V - 1.7V)/50

Ω] * 1.7V = 10.2mW

Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW

FIGURE 6. LVPECL DRIVER CIRCUIT AND TERMINATION

873991 Datasheet(PDF) 13 Page - Integrated Device Technology