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STM8L151C3 Datasheet(PDF) 86 Page - STMicroelectronics

No. de pieza STM8L151C3
Descripción Electrónicos  Reset and supply management
PDF  122 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8L151C3 Datasheet(HTML) 86 Page - STMicroelectronics

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Electrical parameters
STM8L151x2, STM8L151x3
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DocID018780 Rev 9
Figure 31. Typical NRST pull-up current Ipu vs VDD
The reset network shown in Figure 32 protects the device against parasitic resets. The user
must ensure that the level on the NRST pin can go below the VIL(NRST) max. level specified
in Table 41. Otherwise the reset is not taken into account internally.
For power consumption sensitive applications, the external reset capacitor value can be
reduced to limit the charge/discharge current. If the NRST signal is used to reset the
external circuitry, attention must be paid to the charge/discharge time of the external
capacitor to fulfill the external devices reset timing conditions. The minimum recommended
capacity is 10 nF.
Figure 32. Recommended NRST pin configuration



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