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TNETV2685FIBZUT9 Datasheet(PDF) 163 Page - Texas Instruments

No. de pieza TNETV2685FIBZUT9
Descripción Electrónicos  Digital Media Processor
PDF  191 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
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TNETV2685FIBZUT9 Datasheet(HTML) 163 Page - Texas Instruments

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SGMII 0
GMIIport0
Gigabit
MAC 0
SGMII1
(A)
GMIIport1
2
2
2
AddrLookup
Engine
SGMII
Port0
HostDMA
Controller
3-port
Gigabit
Switch
Gigabit
MAC 1
Buffer
Descriptor
Memory
Configuration
Registers
REFCLK
2
2
SGMII
Port1
MII
Serial
Mgmt
Peripheral
Bus
MDIO
Configuration
Bus
Configuration
Bus
DSP
Interrupt
Controller
TMS320DM647
TMS320DM648
www.ti.com
SPRS372H – MAY 2007 – REVISED APRIL 2012
VLAN support
802.1Q compliant
Auto add port VLAN for untagged frames on ingress
Auto VLAN removal on egress and auto pad to minimum frame size
Flow control (IEEE 802.3x)
Programmable priority escalation to specify delivery of lower priority level packets in the event of
over-subscribed TX high priority traffic
Host pass CRC mode (enables CRC protection through host)
Write-protect option for Ethernet module registers (3PGSW, CPPI RAM, MDIO, SGMII0, SGMII1,
control)
Ethernet statistics:
EtherStats and 802.3 Stats RMON statistics gathering (shared)
Programmable statistics interrupt mask when a statistic is above one half its 32-bit value
MDIO module for PHY management
SGMII gigabit current mode logic (CML) differential SERializer/DESerializer (SerDes) I/O
receiver/transmitters
Adaptive active equalization for superior data dependent jitter tolerance in the presence of a
lossy channel
Loss of signal detector with programmable threshold levels in receive channels
Integrated receiver and transmitter termination
IEEE 802.3 gigabit Ethernet conformant
6.19.1 Ethernet Subsystem Functions
A.
SGMII port 1 is not available on DM647.
Figure 6-51. Ethernet Subsystem Block Diagram
Copyright © 2007–2012, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
163
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Product Folder Link(s): TMS320DM647 TMS320DM648



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