TNETV2685FIBZUT7 datasheet(126/191 Pages) TI1

126 / 191 page

TMS320DM647

TMS320DM648

SPRS372H – MAY 2007 – REVISED APRIL 2012

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6.12 VCXO Interpolated Control (VIC)

The VIC can be used in conjunction with the video ports (VPs) to maintain synchronization of a video

stream. The VIC can also be used to control a VCXO to adjust the pixel clock rate to a video port.

6.12.1 VIC Device-Specific Information

The VCXO interpolated control (VIC) port provides digital-to-analog conversation with resolution from 9-

bits to up to 16-bits. The output of the VIC is a single bit interpolated D/A output (VDAC pin).

Typical D/A converters provide a discrete output level for every value of the digital word that is being

converted. This is a problem for digital words that are long. This is avoided in a Sigma Delta type D/A

converter by choosing a few widely spaced output levels and interpolating values between them. The

interpolating mechanism causes the output to oscillate rapidly between the levels in such a manner that

the average output represents the value of input code.

In the VIC, two output levels are chosen (0 and 1), and Sigma Delta interpolation scheme is implemented

to interpolate between these levels with a rapidly changing signal. The frequency of interpolation is

dependent on the resolution needed.

When the video port is used in transport channel interface (TCI) mode, the VIC port is used to control the

system clock, VCXO, for MPEG transport stream.

The VIC supports the following features:

•

Single interpolation for D/A conversion

•

Programmable precision from 9-to-16 bits

•

Interface for register accesses

For

detailed

information

the

VCXO

interpolated

control

(VIC)

peripheral,

see

the

TMS320DM647/DM648 Video Port User's Guide (literature number SPRUEM1).

6.12.2 VIC Peripheral Register Description(s)

Table 6-55. VCXO Interpolated Control (VIC) Port Registers

HEX ADDRESS RANGE

ACRONYM

0x0204 7400

VICCTL

VIC control register

0x0204 7404

VICIN

VIC input register

0x0204 7408

VPDIV

VIC clock divider register

0x0204 740C - 0x0204 77FF

Reserved

126

Peripheral Information and Electrical Specifications

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